PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0401H: THPP STS-1/STM-0 #1 through #12 Indirect Data
Register 0481H: THPP STS-1/STM-0 #13 through #24 Indirect Data
Register 0501H: THPP STS-1/STM-0 #25 through #36 Indirect Data
Register 0581H: THPP STS-1/STM-0 #37 through #48 Indirect Data
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[10]
DATA[9]
DATA[8]
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DATA[15:0]:
The indirect access data (DATA[15:0]) bits hold the data transfer to or from an indirect register
during indirect access. When RWB is set to logic 1 (indirect read), the data from the
addressed location in the register will be transferred to DATA[15:0]. BUSY should be polled
to determine when the new data is available in DATA[15:0]. When RWB is set to logic 0
(indirect write), the data from DATA[15:0] will be transferred to the register. The indirect Data
register must contain valid data before the indirect write is initiated by writing to the Indirect
Address Register.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
229