PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Indirect Register 00H: THPP Control Register
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Reserved
Reserved
FSBEN
PREIEBLK
Reserved
PAIS
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PAIS:
The PAIS bit controls the insertion of the path alarm indication signal. This register bit value
is logically ORed with the results form the SARC block. When a logic 1 is written to this bit
position, the complete SPE/VC-x, and the the pointer bytes (H1, H2) and stuffing opportunity
bytes (H3) are overwritten with the all ones pattern. When a logic 0 is written to this bit
position, the pointer bytes and the SPE/VC-n are processed normally. Upon de-activation of
path AIS, a new data flag accompanies the first valid pointer.
This bit should be consistent for all THPP STS-1/STM0 #N.
PREIEBLK:
The path REI block error (PREIEBLK) bit controls the extraction of path REI errors in the
PREI monitoring block of the STS/AU pointer. When PREIEBLK is set to logic 1, the path
REI extracted represents BIP-8 block errors (a maximum of 1 error per frame). When
PREIEBLK is set to logic 0, the path REI extracted represents BIP-8 errors (a maximum of 8
errors per frame).
This bit is only valid for THPP STS-1/STM0 #1.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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