PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
11
NORMAL MODE REGISTER DESCRIPTION
Normal mode registers are used to configure and monitor the operation of the S/UNI-2488.
Normal mode registers (as opposed to test mode registers) are selected when TRS (A[13]) is low.
Notes on Normal Mode Register Bits:
1. Writing values into unused register bits has no effect. However, to ensure software
compatibility with future, feature-enhanced versions of this product, unused register bits must
be written with logic 0. Reading back unused bits can produce either a logic 1 or a logic 0;
hence, unused register bits should be masked off by software when read.
2. All configuration bits that can be written into can also be read back. This allows the
processor controlling the S/UNI-2488 to determine the programming state of the device.
3. Writeable normal mode register bits are cleared to logic 0 upon reset unless otherwise noted.
4. Writing into read-only normal mode register bit locations does not affect S/UNI-2488
operation unless otherwise noted.
5. Certain register bits are reserved. These bits are associated with megacell functions that are
unused in this application. To ensure that the S/UNI-2488 operates as intended, reserved
register bits must only be written with the logic level as specified. Writing to reserved registers
should be avoided.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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PMC [ PMC-SIERRA, INC ]
