S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x022, 0x122, 0x222, 0x322, 0x422, 0x522, 0x622, 0x722:
TLOP Transmit K1
Bit
Type
Function
K1[7]
K1[6]
K1[5]
K1[4]
K1[3]
K1[2]
K1[1]
K1[0]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
K1[7:0]:
The K1[7:0] bits contain the value inserted in the K1 byte when the APSREG bit in the
TLOP Control Register is logic one. K1[7] is the most significant bit corresponding to bit
1, the first bit transmitted. K1[0] is the least significant bit, corresponding to bit 8, the last
bit transmitted. The bits in this register are double buffered so that register writes do not
need to be synchronized to SONET/SDH frame boundaries. The insertion of a new APS
code value is initiated by a write to this register. The contents of this register, and the TLOP
Transmit K2 Register are inserted in the SONET/SDH stream starting at the next frame
boundary. Successive writes to this register must be spaced at least two frames (250 µs)
apart.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
158
PMC [ PMC-SIERRA, INC ]
