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PM5380-BI 参数 Datasheet PDF下载

PM5380-BI图片预览
型号: PM5380-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 440 页 / 2124 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM5380-BI的Datasheet PDF文件第152页浏览型号PM5380-BI的Datasheet PDF文件第153页浏览型号PM5380-BI的Datasheet PDF文件第154页浏览型号PM5380-BI的Datasheet PDF文件第155页浏览型号PM5380-BI的Datasheet PDF文件第157页浏览型号PM5380-BI的Datasheet PDF文件第158页浏览型号PM5380-BI的Datasheet PDF文件第159页浏览型号PM5380-BI的Datasheet PDF文件第160页  
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet  
Released  
Register 0x020, 0x120, 0x220, 0x320, 0x420, 0x520, 0x620, 0x720:  
TLOP Control  
Bit  
Type  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Function  
Reserved  
Reserved  
APSREG  
Reserved  
Reserved  
Reserved  
Reserved  
LRDI  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
0
0
0
0
0
0
0
0
LRDI:  
The LRDI bit controls the insertion of line remote defect indication (LRDI). When LRDI is  
set to logic one, the TLOP inserts line RDI into the transmit SONET/SDH stream. Line  
RDI is inserted by transmitting the code 110 in bit positions 6, 7 and 8 of the K2 byte of the  
STS-3c stream.  
APSREG:  
The APSREG bit selects the source for the transmit APS channel K1/K2 bytes. When  
APSREG is a logic zero, 0x0000 is inserted in the transmit APS K1 and K2 bytes. When  
APSREG is a logic one, the transmit APS channel is inserted from the TLOP Transmit K1  
Register and the TLOP Transmit K2 Register.  
Reserved:  
The reserved bits must be programmed to logic zero for proper operation.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC- 2010299, Issue 2  
156  
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