STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
5. CTCLK can be a jittered clock signal subject to the minimum high and low
durations tHCTCLK, tLCTCLK. These durations correspond to nominal
XCLK input frequency.
6. When a set-up time is specified between an input and a clock, the set-up
time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4
Volt point of the clock.
7. When a hold time is specified between an input and a clock, the hold time is
the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt
point of the input.
8. Setup, hold, and propagation delay specifications are shown relative to the
default active clock edge, but are equally valid when the opposite edge is
selected as the active edge.
9. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
point of the reference signal to the 1.4 Volt point of the output.
10.Output propagation delays are measured with a 50 pF load on all outputs with
the exception of the high speed DS3 outputs (TCLK, TPOS/TDAT,
TNEG/TMFP). The TCLK, TPOS/TDAT, TNEG/TMFP output propagation
delays are measured with a 20 pF load.
Table 48: Remote Serial Alarm Port Timing
Symbol
Description
Min
Max Units
RADEASTCK and RADWESTCK
1.344
10
MHz
Frequency
RADEASTCK and RADWESTCK Duty
Cycle
40
5
60
%
t
t
RADEASTFP and RADWESTFP Hold
ns
H
RADFP
Time
RADEASTFP and RADWESTFP Setup
Time
5
ns
S
RADFP
t
t
H
S
RADEAST and RADWEST Hold Time
RADEAST and RADWEST Setup Time
5
5
ns
ns
RAD
RAD
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
227
PMC [ PMC-SIERRA, INC ]
