STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
DS2 Transmitter Section:
Sꢀ Generates the required X, F, and M bits into the transmitted DS2 bit stream.
Allows inversion of inserted F or M bits for diagnostic purposes.
Sꢀ Provides for transmission of far end receive failure (FERF) and alarm
indication signal (AIS) under microprocessor control.
Sꢀ Provides optional automatic insertion of far end receive failure (FERF) on
detection of out of frame (OOF), alarm indication signal (AIS) or red alarm
condition.
M12 Multiplexer Section:
Sꢀ Multiplexes four DS1 bit streams into a single M12 format DS2 bit stream.
Sꢀ Performs required bit stuffing including generation and interpretation of C-
bits.
Sꢀ Includes required FIFO buffers for rate adaptation in the multiplex path.
Sꢀ Performs required inversion of second and fourth multiplexed DS1 streams
as required by ANSI T1.107 Section 7.2.
Sꢀ Allows insertion and detection of per DS1 payload loopback requests
encoded in the C-bits to be activated under microprocessor control.
Sꢀ Allows per tributary alarm indication signal (AIS) to be activated or cleared for
either direction under microprocessor control.
Sꢀ Allows automatic tributary AIS to be activated upon DS2 out of frame.
Scaleable Bandwidth Interconnect (SBI) Bus:
Sꢀ Provides a high density byte serial interconnect for all framed and unframed
TEMAP links. Utilizes an Add/Drop configuration to asynchronously mutliplex
up to 84 T1s, 63 E1s or 3 DS3s, equivalent to three TEMAPs, with multiple
payload or link layer processors.
Sꢀ External devices can access unframed DS3, framed unchannelized DS3,
unframed (clear channel) T1s, unframed (clear channel) E1s, transparent
virtual tributaries or transparent tributary units over this interface.
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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