PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Table 12
Symbol Description
HSCLK Frequency (nominally 77.76 MHz)
- TUPP+622 Input Timing HSCLK (Figure 34)
Min Max Units
80
60
MHz
%
HSCLK Duty Cycle
40
2
0
2
0
2
0
2
0
2
0
2
0
2
0
2
0
2
0
tS
ID[7:0] Set-up Time
ID[7:0] Hold Time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ID
tH
ID
tS
IDP[1] Set-up Time
IDP[1] Hold Time
IDP
tH
IDP
PL
tS
tH
IPL[1] Set-Up Time
IPL[1] Hold Time
PL
tS
IC1J1[1] Set-Up Time
IC1J1[1] Hold Time
GSCLK_FP Set-Up Time
GSCLK_FP Hold Time
ITMF[1] and OTMF[1] Set-Up Time
ITMF[1] and OTMF[1] Hold Time
ITPL[1] Set-Up Time
ITPL[1] Hold Time
C1J1
tH
C1J1
FP
tS
tH
FP
tS
TMF
tH
TMF
TPL
tS
tH
TPL
TV5
tS
tH
ITV5[1] Set-Up Time
ITV5[1] Hold Time
TV5
AIS
tS
tH
IAIS[1] Set-Up Time
IAIS[1] Hold Time
AIS
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
421
PMC [ PMC-SIERRA, INC ]
