PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
18
TUPP+622 TIMING CHARACTERISTICS
(T = -40°C to +85°C, V = 3.3 V ± 0.3 V, V = 2.5 V ± 0.2 V)
DD2.5
A
DD3.3
Table 11
Symbol Description
SCLK Frequency (nominally 19.44 MHz )
- TUPP+622 Input Timing For SCLK (Figure 34)
Min Max Units
20
60
MHz
%
ns
SCLK Duty Cycle
40
3
tS
ID[7:0], ID[15:8], ID[23:16], ID[31:24] Set-up
Time
ID
tH
ID[7:0], ID[15:8], ID[23:16], ID[31:24] Hold
Time
1.5
ns
ID
tS
IDP[4:1] Set-up Time
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IDP
tH
IDP[4:1] Hold Time
1.5
3
IDP
PL
tS
tH
IPL[4:1] Set-Up Time
IPL[4:1] Hold Time
1.5
3
PL
tS
IC1J1[4:1] Set-Up Time
IC1J1[4:1] Hold Time
C1J1
tH
1.5
3
C1J1
TMF
tS
tH
ITMF[4:1] and OTMF[4:1] Set-Up Time
ITMF[4:1] and OTMF[4:1] Hold Time
ITPL[4:1] Set-Up Time
ITPL[4:1] Hold Time
1.5
3
TMF
TPL
tS
tH
1.5
3
TPL
TV5
tS
tH
ITV5[4:1] Set-Up Time
ITV5[4:1] Hold Time
1.5
3
TV5
AIS
tS
tH
IAIS[4:1] Set-Up Time
IAIS[4:1] Hold Time
1.5
AIS
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
420