PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register 1B8H, 2B8H, 3B8H: RTOP, TU #3 in TUG2 #1 to TUG2 #7, COPSL
Interrupt
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
COPSL7I
COPSL6I
COPSL5I
COPSL4I
COPSL3I
COPSL2I
COPSL1I
X
0
0
0
0
0
0
0
R
R
R
R
R
R
R
This register is used to identify and acknowledge change of path signal label
interrupts for the tributaries TU #3 in TUG2 #1 TO TUG2 #7.
COPSL1I-COPSL7I:
The COPSL1I to COPSL7I bits identify the source of change of path signal
label interrupts. In TU3 mode, these bits are unused and will return a logic 0
when read. When the corresponding TUG2 tributary group is configured for
TU2 (VT6) or VT3 mode, the associated COPSLxI bit is unused and will
return a logic 0 when read. When operational, the COPSL1I to COPSL7I bits
report and acknowledge COPSL interrupt of TU #3 in TUG2 #1 to TUG2 #7,
respectively. Interrupts are generated when the accepted PSL changes. An
COPSLxI bit is set high when a change of PSL event on the associated
tributary (TU #3 in TUG2 #x) occurs and are cleared immediately following a
read of this register, which also acknowledges and clears the interrupt.
COPSLxI remains valid when interrupts are not enabled (COPSLE set low)
and may be polled to detect change of path signal label events.
Reserved:
The Reserved bits must be written with a logic 0 for proper operation of the
TUPP+622.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
272
PMC [ PMC-SIERRA, INC ]
