PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Register A0H, C0H, E0H: VTPP, TU3 or TU #1 in TUG2 #1, Alarm Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R/W
R
R/W
SS[1]
SS[0]
NJEI
PJEI
ESEI
X
X
X
X
X
0
PEE
AISV
RELAYAIS
X
0
In TU3 mode (TU3 bit in VTPP Configuration register set high), this register
reports the alarm status of the TU3 mapped into a TUG3 handled by the VTPP.
Out of TU3 mode, this register reports the alarm status of TU #1 in TUG2 #1.
RELAYAIS:
The RELAYAIS bit controls the number of consecutive AIS_ind indications
required to enter the AIS state for tributary TU #1 in TUG2 #1 or TU3
depending on whether the VTPP is in TU3 mode. When RELAYAIS is set
high, AIS is declared upon receipt of a single AIS_ind indication. When
RELAYAIS is set low, AIS is declared after 3 consecutive AIS_ind indications.
AISV:
The AISV bit indicates the tributary path AIS status of tributary TU #1 in
TUG2 #1 or TU3 depending on whether the VTPP is in TU3 mode.
PEE:
The PEE bit enables pointer event interrupts for tributary TU #1 in TUG2 #1 or
TU3 depending on whether the VTPP is in TU3 mode. When PEE is set high,
an interrupt is generated upon detection of FIFO underflows and overflows,
upon detection of incoming pointer justification events when the MONIS bit is
set high and upon detection of outgoing pointer justification events when the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
185
PMC [ PMC-SIERRA, INC ]
