PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
TUGEN:
When set high, the TUGEN bit enables the processing of tributaries in
STS-1 #2 (TUG3 #2). When TUGEN is low, VTPP #2, RTOP #2 and RTTB #2
are held in a low power, reset state. The data in STS-1 #2 (TUG3 #2) is re-
transmitted unchanged on the outgoing data stream. The amount of delay
from the incoming to the outgoing data stream is a function of the internal
data-path pipeline delay and GSCLK_FP input. See the bypass functional
timing diagram for details. When TUGEN is set low, all VTTP #2, RTOP #2,
and RTTB #2 registers are reset to their default states.
Before the TUGEN bit is set high, it is essential to first set the
NOIC1J1PLBYP bit in the STP VTPP #2 Configuration #2 register high. This
will ensure that the re-transmission of the corresponding input Telecom Bus
signals, IC1J1 and IPL, to the output Telecom Bus is terminated gracefully.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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