PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
Address A[13:0]
Description
REG
#
STP
#1
STP
#2
STP
#3
STP
#4
480-
4BF
0480- 0C80- 1480- 1C80- RTTB #3 Registers
04BF 0CBF 14BF 1CBF
2000
Master Test
2001-
3FFF
Reserved for Test
Notes on Register Memory Map:
1. For all register accesses, CSB must be low.
2. Addresses that are not shown must be treated as Reserved.
3. A[13] is the test resistor select (TRS) and should be set to logic 0 for normal
mode register access.
4. All register numbers and addresses shown are in hexadecimal.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
116