PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
IPLA:
The IPL active (IPLA) bit monitors for low to high transitions on the IPL input.
IPLA is set high on a rising edge of IPL, and is set low when this register is
read.
ITMFA:
The ITMF active (ITMFA) bit monitors for low to high transitions on the ITMF
input. ITMFA is set high on a rising edge of ITMF, and is set low when this
register is read.
IDA:
The ID bus active (IDA) bit monitors for low to high transitions on the ID[7:0]
inputs. IDA is set high when rising edges have been observed on all the
signals on the ID[7:0] bus, and is set low when this register is read.
OC1J1A:
The OC1J1 active (OC1J1A) bit monitors for low to high transitions on the
OC1J1 input. OC1J1A is set high on a rising edge of OC1J1, and is set low
when this register is read.
OPLA:
The OPL active (OPLA) bit monitors for low to high transitions on the OPL
input. OPLA is set high on a rising edge of OPL, and is set low when this
register is read.
OTMFA:
The OTMF active (OTMFA) bit monitors for low to high transitions on the
OTMF input. OTMFA is set high on a rising edge of OTMF, and is set low
when this register is read.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
73
PMC [ PMC-SIERRA, INC ]
