PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
LOM1E:
The LOM1E bit is an interrupt enable bit for the H4 framer out of frame
interrupt in tributary payload processor #1. When LOM1E is set high, a
change in the framer out of frame status will cause an interrupt to be
generated on the INTB output. Interrupts are masked when LOME is set low.
LOM2E:
The LOM2E bit is an interrupt enable bit for the H4 framer out of frame
interrupt in tributary payload processor #2. When LOM2E is set high, a
change in the framer out of frame status will cause an interrupt to be
generated on the INTB output. Interrupts are masked when LOME is set low.
When ICONCAT is set to logic 1 this interrupt enable bit should be set to logic
0. In the AU4 mode the multiframe alignment is determined by the H4 byte
framer in tributary payload processor #1.
LOM3E:
The LOM3E bit is an interrupt enable bit for the H4 framer out of frame
interrupt in tributary payload processor #3. When LOM3E is set high, a
change in the framer out of frame status will cause an interrupt to be
generated on the INTB output. Interrupts are masked when LOME is set low.
When ICONCAT is set to logic 1 this interrupt enable bit should be set to logic
0. In the AU4 mode the multiframe alignment is determined by the H4 byte
framer in tributary payload processor #1.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
85
PMC [ PMC-SIERRA, INC ]
