PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
Register 07H:Tributary Payload Processor and LOM Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
LOM3E
LOM2E
LOM1E
VTPP3E
VTPP2E
VTPP1E
X
X
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
This register provides interrupt enable of the three H4 byte framers and of the
three tributary payload processors in the TUPP-PLUS.
VTPP1E:
VTPP1E is the interrupt enable bit for tributary payload processor #1 in the
TUPP-PLUS. Interrupts enabled at tributary processor #1 but masked by
VTPP1E will still be reported by the VTPP1I bit, although the interrupt output
will not be activated. Interrupts disabled at tributary payload processor #1 will
not be reported by the VTPP1I bit.
VTPP2E:
VTPP2E is the interrupt enable bit for tributary processor #2 in the
TUPP-PLUS. Interrupts enabled at tributary payload processor #2 but
masked by VTPP2E will still be reported by the VTPP2I bit, although the
interrupt output will not be activated. Interrupts disabled at tributary payload
processor #2 will not be reported by the VTPP2I bit.
VTPP3E:
VTPP3E is the interrupt enable bit for tributary payload processor #3 in the
TUPP-PLUS. Interrupts enabled at tributary processor #3 but masked by
VTPP3E will still be reported by the VTPP3I bit, although the interrupt output
will not be activated. Interrupts disabled at tributary payload processor #3 will
not be reported by the VTPP3I bit.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
84
PMC [ PMC-SIERRA, INC ]
