PMC-Sierra, Inc.
PM5356
S/UNI-622-MAX
DATASHEET
S/UNI-622-MAX
PMC-1980589
ISSUE 5
SATURN USER NETWORK INTERFACE (622-MAX)
VCI and VPI fields. The RXCP Match Header Pattern and RXCP Match Header Mask registers
allow filtering control over the contents of the GFC, PTI, and CLP fields of the header.
The HCS is a CRC-8 calculation over the first 4 octets of the ATM cell header. The RXCP block
8
2
6
4
verifies the received HCS using the polynomial, x + x + x + 1. The coset polynomial, x + x +
2
x + 1, is added (modulo 2) to the received HCS octet before comparison with the calculated
result. While the cell delineation state machine in Figure 5 is in the SYNC state, the HCS
verification circuit implements the state machine shown in Figure 6.
In normal operation, the HCS verification state machine remains in the ’Correction Mode’ state.
Incoming cells containing no HCS errors are passed to the receive FIFO. Incoming single-bit
errors are corrected, and the resulting cell is passed to the FIFO. Upon detection of a single-bit
error or a multi-bit error, the state machine transitions to the ’Detection Mode’ state. In this state,
programmable HCS error filtering is provided. The detection of any HCS error causes the
corresponding cell to be dropped. The state machine transitions back to the ’Correction Mode’
state when M (where M = 1, 2, 4, 8) cells are received with correct HCSs. The Mth cell is not
discarded.
Figure 6: HCS Verification State Diagram
ATM DELINEATION
SYNC STATE
ALPHA
consecutive
incorrect HCS’s
(To HUNT state)
Apparent Multi-Bit Error
(Drop Cell)
No Errors
CORRECTION
Detected
MODE
(Pass Cell)
Single-Bit Error
(Correct Error
Errors
Detected
and Pass Cell)
(Drop Cell)
DETECTION
MODE
No Errors Detected
DELTA
In M Cells
consecutive
(Pass Mth Cell)
correct HCS’s
No Errors Detected
(From PRESYNC
state)
(Pass Cell)
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52
PMC [ PMC-SIERRA, INC ]
