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PM5356-BI 参数 Datasheet PDF下载

PM5356-BI图片预览
型号: PM5356-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM Network Interface, 1-Func, CMOS, PBGA304, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 278 页 / 1562 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PM5356  
S/UNI-622-MAX  
DATASHEET  
S/UNI-622-MAX  
PMC-1980589  
ISSUE 5  
SATURN USER NETWORK INTERFACE (622-MAX)  
the K2 byte for three consecutive frames. When LRDIDET is set to logic zero, line RDI is  
declared when a 110 binary pattern is detected in bits 6, 7 and 8 of the K2 byte for five  
consecutive frames.  
AISDET:  
The AISDET bit determines the line AIS alarm detection algorithm. When AISDET is set to  
logic one, line AIS is declared when a 111 binary pattern is detected in bits 6, 7 and 8 of the  
K2 byte for three consecutive frames. When AISDET is set to logic zero, line AIS is declared  
when a 111 binary pattern is detected in bits 6, 7 and 8 of the K2 byte for five consecutive  
frames.  
ALLONES:  
The ALLONES bit controls automatically forcing the SONET/SDH frame passed to  
downstream blocks to logical all-ones whenever line AIS is detected. When ALLONES is set  
to logic one, the SONET/SDH frame is forced to logic one immediately when the line AIS  
alarm is declared. When line AIS is removed, the downstream data stream is immediately  
returned to carrying the receive data. When ALLONES is set to logic zero, the downstream  
data stream always carry the receive data regardless of the line AIS alarm state.  
BIPWORD:  
The BIPWORD bit controls the accumulation of B2 errors. When BIPWORD is logic one, the  
B2 error event counter is incremented only once per frame whenever one or more B2 bit  
errors occur during that frame. When BIPWORD is logic zero, the B2 error event counter is  
increment for each and every B2 bit error that occurs during that frame.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERSINTERNAL USE  
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