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PM4351-RI 参数 Datasheet PDF下载

PM4351-RI图片预览
型号: PM4351-RI
PDF下载: 下载PDF文件 查看货源
内容描述: 联合E1 / T1收发器 [COMBINED E1/T1 TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 485 页 / 3011 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4351 COMET  
DATA SHEET  
PMC-1970624  
ISSUE 10  
COMBINED E1/T1 TRANSCEIVER  
frequencies above 20 kHz. When ALGSEL is set to logic 0, the jitter  
tolerance is increased for frequencies below 20 kHz (i.e. the tolerance is  
improved by 20% over that of ALGSEL=1 at these frequencies), but the  
tolerance approaches 0.4 UIpp at the higher frequencies.  
AMI:  
The alternate mark inversion (AMI) bit specifies the line coding of the  
incoming signal. A logic 1 selects AMI line coding by disabling HDB3  
decoding if E1 mode and B8ZS in T1 mode. In E1 mode, a logic 0 selects  
HDB3 line decoding which entails substituting an HDB3 signature with four  
zeros. In T1 mode, a logic 0 selects B8ZS line decoding which entails  
substituting an B8ZS signature with eight zeros.  
LOS[1:0]:  
The loss of signal threshold is set by the operating mode and the state of the  
AMI, LOS[1] and LOS[0] bits:  
Table 20  
- Loss of Signal Thresholds  
Mode AMI LOS[1] LOS[0] Threshold (PCM periods)  
E1  
T1  
X
0
0
0
0
0
0
1
1
0
0
0
1
0
1
10  
15  
15  
31  
63  
175  
1
X
X
X
X
X
X
When the number of consecutive zeros on the incoming PCM line exceeds  
the programmed threshold, the LOSV status bit is set. For example, if the  
threshold is set to 10, the 11th zero causes the LOSV bit to be set. The LOSV  
bit clears when a pulse occurs.  
PROPRIETARY AND CONFIDENTIAL  
109  
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