STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
Register 00BH: Master Test
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
IDDQEN
PMCATST
PMCTST
DBCTRL
IOTST
X
X
X
X
0
0
0
0
W
W
W
W
R/W
W
HIZDATA
HIZIO
R/W
This register is used to select COMET test features. All bits, except for PMCTST,
PMCATST and IDDQEN are reset to zero by a hardware reset of the COMET; a
software reset of the COMET does not affect the state of the bits in this register.
Refer to the Test Features Description section for more information.
IDDQEN:
The IDDQEN bit is used to configure the COMET for IDDQ tests. IDDQEN is
cleared when CSB is high and RSTB is low or when IDDQEN is written as
logic 0. When the IDDQEN bit is set to logic 1, the HIGHZ bit in the XLPG
Line Driver Configuration register must also be set to logic 1.
PMCATST:
The PMCATST bit is used to configure the analog portion of the COMET for
PMC's manufacturing tests. PMCATST is cleared when CSB is high and
RSTB is low or when PMCATST is written as logic 0.
PMCTST:
The PMCTST bit is used to configure the COMET for PMC's manufacturing
tests. When PMCTST is set to logic 1, the COMET microprocessor port
becomes the test access port used to run the PMC manufacturing test
vectors. The PMCTST bit is logically "ORed" with the IOTST bit, and is
cleared by setting CSB high.
DBCTRL:
The DBCTRL bit is used to pass control of the data bus drivers to the CSB
pin. When the DBCTRL bit is set to logic 1, the CSB pin controls the output
PROPRIETARY AND CONFIDENTIAL
100
PMC [ PMC-SIERRA, INC ]
