STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
data from the output of the CDRC block. In digital mode (RUNI is logic 1), the
data sent to the TJAT is a sampled version of the RDAT digital input. When
LINELB is set to logic 1, the line loopback mode is enabled. When LINELB
is set to logic 0, the line loopback mode is disabled. Note that when line
loopback is enabled, to correctly attenuate the jitter on the receive clock, the
contents of the TJAT Reference Clock Divisor and Output Clock Divisor
registers should be programmed to 2FH in T1 or FFH in E1 and the Transmit
Timing Options register should be cleared to all zeros. Only one of PAYLB,
LINELB, and DDLB can be enabled at any one time.
RAIS:
When a logic 1, the RAIS bit forces all ones into the BRPCM data stream.
The BRSIG data stream will freeze at the current valid signaling. This
capability is provided to indicate the unavailability of the line when line
loopback is active.
DDLB:
The DDLB bit selects the diagnostic digital loopback mode, where the
COMET is configured to internally direct the output of the TJAT to the inputs
of the receiver section. In analog mode (RUNI is logic 0), the dual-rail RZ
outputs of the TJAT are directed to the dual-rail inputs of the CDRC. In digital
mode (RUNI is logic 1), the single-rail NRZ outputs of the TJAT are directed
to the inputs of the RJAT. When DDLB is set to logic 1, the diagnostic digital
loopback mode is enabled. When DDLB is set to logic 0, the diagnostic
digital loopback mode is disabled. When configured for diagnostic digital
loopback, the TUNI and RUNI bits must be set to the same value. Only one of
PAYLB, LINELB, and DDLB can be enabled at any one time.
TXMFP:
In T1 mode, the TXMFP bit introduces a mimic framing pattern in the digital
output of the basic transmitter by forcing a copy of the current framing bit into
bit location 1 of the frame, thereby creating a mimic pattern in the bit position
immediately following the correct framing bit. When TXMFP is set to logic 1,
the mimic framing pattern is generated. When TXMFP is set to logic 0, no
mimic pattern is generated.
TXLOS:
The TXLOS bit provides a method of suppressing the output of the
transmitter in T1 digital mode. When TXLOS is set to logic 1, the E1/T1B bit
in the Global Configuration register is a logic 0 and the TUNI bit in the
Transmit Line Interface Configuration register is a logic 1, the transmit output,
TDAT is forced to all-zeros. In both E1 and T1 analog mode (TUNI is
logic 0), the TXTIP and TXRING outputs can be forced to all-zeros by
programming the XLPG Line Driver Configuration register.
PROPRIETARY AND CONFIDENTIAL
99
PMC [ PMC-SIERRA, INC ]
