STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
Register 015H: RJAT Divider N1 Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N1[7]
N1[6]
N1[5]
N1[4]
N1[3]
N1[2]
N1[1]
N1[0]
0
0
1
0
1
1
1
1
This register contains an 8-bit binary number, N1, which is one less than the
magnitude of the reference clock divisor. The reference divisor magnitude,
(N1+1), is the ratio between the frequency of the recovered clock (or the transmit
clock if a diagnostic loopback is enabled) and the frequency at the phase
discriminator input.
Writing to this register will reset the PLL. If the FIFORST bit of the RJAT
Configuration register is set high, a write to this register will reset both the PLL
and FIFO.
The default value of N1 after a device reset is 47 = 2FH.
PROPRIETARY AND CONFIDENTIAL
115
PMC [ PMC-SIERRA, INC ]
