PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 50H: RPSC Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
Unused
Unused
Unused
IND
X
X
X
X
X
X
0
R/W
R/W
PCCE
0
This register allows selection of the microprocessor read access type and output
enable control for the Receive Per-channel Serial Controller.
IND:
The IND bit controls the microprocessor access type: either indirect or direct.
The IND bit must be set to logic 1 for proper operation. When the T1XC is
reset, the IND bit is set low, disabling the indirect access mode.
PCCE:
The PCCE bit enables the per-channel functions. When the PCCE bit is set
to a logic 1, the Data Trunk Conditioning Code byte and Signalling Trunk
Conditioning Code byte are enabled to modify the received data and
extracted signalling data streams (visible on BRPCM and BRSIG, if selected)
under direction of each channel's PCM Control byte. When the PCCE bit is
set to logic 0, the per-channel functions are disabled.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
174
PMC [ PMC-SIERRA, INC ]
