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PM4341A-QI 参数 Datasheet PDF下载

PM4341A-QI图片预览
型号: PM4341A-QI
PDF下载: 下载PDF文件 查看货源
内容描述: T1成帧器/收发器 [T1 FRAMER/TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路
文件页数/大小: 288 页 / 981 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM4341AT1XC  
DATA SHEET  
PMC-900602  
ISSUE 7  
T1 FRAMER/TRANSCEIVER  
Note that when DJAT is not being used (e.g. where a 12.352 or 16.384 MHz  
XCLK is used), TCLKI must be synchronized with RCLKO for error free  
operation of Line Loopback.  
DDLB:  
The DDLB bit selects the diagnostic digital loopback mode, where the digital  
positive and negative RZ pulse outputs from DJAT are internally connected to  
the receive positive and negative pulse inputs of CDRC. When DDLB is set to  
logic 1, the diagnostic digital loopback mode is enabled. When DDLB is set to  
logic 0, the diagnostic digital loopback mode is disabled. If diagnostic digital  
loopback is to be used, the TUNI bit must be set to logic 0 in the Transmit  
DS1 Interface Configuration register, and the RUNI bit must be set to logic 0  
in the Receive DS1 Interface Configuration register.  
DMLB:  
The DMLB bit enables the diagnostic metallic loopback mode, where the  
digital, RZ positive and negative sliced versions of the analog signals output  
on the TAP and TAN pins from XPLS are internally connected to the receive  
positive and negative pulse inputs of CDRC. Some line build-outs require  
large negative pulses in order to satisfy the template at the far end of the line.  
However, as DMLB is essentially a zero-line-length loopback, the 0-110’ line  
length template should be selected if DMLB is to be used. When DMLB is set  
to logic 1, the diagnostic metallic loopback mode is enabled. When DMLB is  
set to logic 0, the diagnostic metallic loopback mode is disabled. If diagnostic  
metallic loopback is to be used, the TUNI bit must be set to logic 0 in the  
Transmit DS1 Interface Configuration register, and the RUNI bit must be set to  
logic 0 in the Receive DS1 Interface Configuration register.  
TXMFP:  
The TXMFP bit introduces a mimic framing pattern in the digital output of the  
basic transmitter by forcing a copy of the current framing bit into bit location 1  
of the frame, thereby creating a mimic pattern in the bit position immediately  
following the correct framing bit. When TXMFP is set to logic 1, the mimic  
framing pattern is generated. When TXMFP is set to logic 0, no mimic pattern  
is generated.  
TXDIS:  
The TXDIS bit provides a method of suppressing the output of the basic  
transmitter. When TXDIS is set to logic 1, the digital output of XBAS is  
disabled by forcing it to logic 0. When TXDIS is set to logic 0, the digital output  
of XBAS is not suppressed.  
Upon reset of the T1XC, these register bits are cleared to zero.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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