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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM4328-PI的Datasheet PDF文件第42页浏览型号PM4328-PI的Datasheet PDF文件第43页浏览型号PM4328-PI的Datasheet PDF文件第44页浏览型号PM4328-PI的Datasheet PDF文件第45页浏览型号PM4328-PI的Datasheet PDF文件第47页浏览型号PM4328-PI的Datasheet PDF文件第48页浏览型号PM4328-PI的Datasheet PDF文件第49页浏览型号PM4328-PI的Datasheet PDF文件第50页  
STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
Pin Name  
Type Pin Function  
No.  
IFP[12]  
IFP[13]  
IFP[14]  
IFP[15]  
IFP[16]  
IFP[17]  
IFP[18]  
IFP[19]  
IFP[20]  
IFP[21]  
IFP[22]  
IFP[23]  
IFP[24]  
IFP[25]  
IFP[26]  
IFP[27]  
IFP[28]  
G1 Channel modes IFP[x] is not used.  
V20  
Y22  
K20  
J19  
W4  
V1  
In E1 mode only IFP[1:21] is used.  
IFP[1] shares a pin with the DS3 system interface  
signal RFPO/RMFPO. IFP[20,27,28] shares pins with  
the SBI interface signals SDDP, SDPL, SDV5.  
E1  
D9  
U19  
R22  
J22  
J20  
K1  
K2  
D8  
A9  
ID[1]  
Output AA5  
Y6  
Ingress Data (ID[1:28]). Each ID[x] signal contains  
the recovered data stream which may have been  
passed through the elastic store.  
When the Clock Slave ingress modes are active, the  
ID[x] stream has passed through the elastic store and  
is aligned to the common ingress timing. In this mode  
ID[x] is updated on the active edge of CICLK.  
When the Clock Master ingress modes are active, ID[x]  
is aligned to the receive line timing and is updated on  
the active edge of the associated ICLK[x].  
ID[2]  
ID[3]  
AA20  
T19  
R19  
P20  
G22  
G21  
Y2  
ID[4]  
ID[5]  
ID[6]  
ID[7]  
ID[8]  
ID[9]  
ID[10]  
ID[11]  
ID[12]  
ID[13]  
ID[14]  
ID[15]  
ID[16]  
ID[17]  
ID[18]  
ID[19]  
ID[20]  
ID[21]  
ID[22]  
ID[23]  
ID[24]  
W2  
G4  
H2  
In E1 mode only ID[1:21] are used.  
P21  
P22  
A12  
D12  
U2  
ID[1,5,9,13,17,21,25] share pins with the H-MVIP data  
signals MVID[1:7]. ID[2,6,10,14,18,22,26] share pins  
with the H-MVIP CAS signals CASID[1:7]. ID[1] shares  
a pin with the DS3 system interface signal RDATO.  
ID[2] shares a pin with the DS3 system interface signal  
ROVRHD. ID[15,16,19,20,23,24,27,28] shares pins  
with the SBI interface bus SDDATA[7:0].  
V4  
D11  
A11  
M19  
L19  
D10  
A10  
PROPRIETARY AND CONFIDENTIAL  
33  
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