STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
Table 48: Transmit Line Interface Timing (Figure 98)
Symbol
Description
Min
Max
Units
CTCLK Frequency (when used for TJAT
REF), typically 1.544 MHz± 130 ppm for
T1 operation or 2.048 MHz± 50 ppm for E1
1.5
2.1
MHz
2,3,6
operation
4
t
100
100
ns
ns
CTCLK High Duration (when used for
H
CTCLK
TJAT REF)
4
t
CTCLK Low Duration (when used for
L
CTCLK
TJAT REF)
Figure 98: Transmit Line Interface Timing
tHCTCLK
CTCLK
tCTCLK
tL
CTCLK
Notes on Ingress and Egress Serial Interface Timing:
1. CECLK and CICLK can be gapped and/or jittered clock signals subject to the
minimum high and low times shown. These specifications correspond to
nominal XCLK input frequencies.
2. Guaranteed by design for nominal XCLK input frequency (37.056 MHz ±100
ppm for T1 modes and 49.152 MHz ±50ppm for E1 modes).
3. CTCLK can be a jittered clock signal subject to the minimum high and low
times shown. These specifications correspond to nominal XCLK input
frequency of 37.056 MHz ±100 ppm for T1 modes and 49.152 MHz ±50ppm
for E1 modes.
4. High pulse width is measured from the 1.4 Volt points of the rise and fall
ramps. Low pulse width is measured from the 1.4 Volt points of the fall and
rise ramps.
PROPRIETARY AND CONFIDENTIAL
230
PMC [ PMC-SIERRA, INC ]
