STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
Table 46: Ingress Interface Timing - Clock Slave Modes (Figure 96)
Symbol
Description
Min
Max
Units
1,2
1.5
2.1
MHz
Common Ingress Clock Frequency
(Typically 1.544 MHz ± 130 ppm or
2.048 MHz ± 130 ppm for T1 modes
and 2.048 MHz ±50ppm for E1
modes)
2,4
t1
167
167
145
145
ns
ns
ns
ns
Common Ingress High Pulse Width
(XCLK = 37.056 MHz)
CICLK
2,4
t0
Common Ingress Low Pulse Width
(XCLK = 37.056 MHz)
CICLK
2,4
t1
Common Ingress High Pulse Width
(XCLK = 49.152 MHz)
CICLK
2,4
t0
Common Ingress Low Pulse Width
(XCLK = 49.152 MHz)
CICLK
7,9
tSCICLK
tHCICLK
tPCICLK
20
20
5
ns
ns
ns
CICLK to CIFP Set-up Time
8,9
CICLK to CIFP Hold Time
CICLK to Ingress Output Prop.
100
Delay9,10,11
PROPRIETARY AND CONFIDENTIAL
227