STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
B24, C1-C24, D1-D24. When using 2 state CAS there are only A1-A24 signaling
bits.
Table 18: T1 Channel Associated Signaling bits
SF
F
ESF
F
M1
C1
M2
F1
M3
C2
M4
F2
M5
C3
M6
F3
M7
C4
M8
F4
M9
C5
M10
F5
M11
C6
M12
F6
S1
A1
A5
S2
A2
A6
A10
A14
A18
A22
B2
S3
A3
A7
A11
A15
A19
A23
B3
S4
A4
A8
A12
A16
A20
A24
B4
P1 P0
00
00
00
00
00
00
01
01
01
01
01
01
10
10
10
10
10
10
11
F1
S1
F2
S2
F3
S3
F4
S4
F5
S5
F6
S6
F1
S1
F2
S2
F3
S3
F4
S4
F5
S5
F6
S6
A9
A13
A17
A21
B1
B5
B9
B13
B17
B21
C1
C5
C9
C13
C17
C21
D1
D5
D9
D13
D17
D21
B6
B7
B8
B10
B14
B18
B22
C2
B11
B15
B19
B23
C3
B12
B16
B20
B24
C4
C6
C7
C8
C10
C14
C18
C22
D2
C11
C15
C19
C23
D3
C12
C16
C20
C24
D4
D6
D7
D8
11
11
11
11
D10
D14
D18
D22
D11
D15
D19
D23
D12
D16
D20
D24
11
Note that in synchronous mode, the SF/ESF F-bits may have arbitrary alignment
with respect to the P1P0 phase alignment bits, due to possible frame slips at the
T1 level. However, CAS is always aligned to the P1P0 bits (i.e. in either
synchronous or asynchronous mode).
T1 tributary asynchronous timing is compensated via the V3 octet. T1 tributary
link rate adjustments are optionally passed across the SBI via the V4. T1
tributary alarm conditions are optionally passed across the SBI bus via the link
rate octet in the V4 location.
In synchronous mode the T1 tributary mapping is fixed to that shown in Table 17
and rate justifications are not possible using the V3 octet. The clock rate
PROPRIETARY AND CONFIDENTIAL
164
PMC [ PMC-SIERRA, INC ]
