STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
the framer. The payload can also be looped-back on a per-DS0 basis to allow
network testing without taking an entire DS1 off-line.
T1/E1 Line Loopback
T1/E1 Line loopback is initiated by setting the LLOOP bit to a 1 in the T1/E1
Diagnostics register (000DH + N*80H, N=1 to 28). When in line loopback mode
the appropriate T1/E1 framer in the TECT3 is configured to internally connect the
jitter-attenuated clock and data from the RJAT to the transmit clock and data
(shown as TxD[x] and TxCLK[x] in the lineloopback diagram) going to the M13
mux. The RJAT may be bypassed if desired. Conceptually, the data flow
through a single T1/E1 framer in this loopback condition is illustrated in Figure
35.
Figure 35: T1/E1 Line Loopback
CTCLK*
TRANSMITTER
T1-XBAS/E1-TRAN
TOPS
ED[1:28]
ESIF
Egress
BasicTransmitter:
Timing Options
Frame Generation,
Alarm Insertion,
Signaling
ECLK[1:28]/EFP[1:28]/
Interface
ESIG[1:28]
TJAT
TxCLK[1:28]
TxD[1:28]
CEFP*
Digital Jitter
Attenuator
Trunk Conditioning
CECLK*
Line Coding
FRAM
CICLK*
CIFP*
Framer/
Li ne Loopback
ELST
Elastic
Store
Slip Buffer
RAM
T1/E1-FRMR
Framer:
ID[1:28]
ICLK[1:28]/ISIG[1:28]
IFP[1:28]
RxCLK[1:28]
RxD[1:28]
RJAT
Frame
Digital Jitter
Attenuator
ISIF
Ingress
Interface
Alignment,
Alarm
Extraction
RECEIVER
T1/E1 Diagnostic Digital Loopback
When Diagnostic Digital loopback is initiated, by writing a 1 to the DLOOP bit in
the T1/E1 Diagnostics register (000DH + N*80H, N=1 to 28), the appropriate
T1/E1 framer in the TECT3 is configured to internally connect its transmit clock
and data (shown as TxD[x] and TxCLK[x] in the diagnostic loopback figure) to the
PROPRIETARY AND CONFIDENTIAL
152
PMC [ PMC-SIERRA, INC ]
