STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
microprocessor access: when the BUSY bit is logic 1, the TPSC or RPSC is
processing an access request; when the BUSY bit is logic 0, the TPSC or RPSC
has completed the request.
The indirect write programming sequence for the TPSC (RPSC) is as follows:
1. Check that the BUSY bit in the TPSC (RPSC) µP Access Status Register is
logic 0.
2. Write the channel data to the TPSC (RPSC) Channel Indirect Data Buffer
register.
3. Write RWB=0 and the channel address to the TPSC (RPSC) Channel Indirect
Address/Control Register.
4. Poll the BUSY bit until it goes to logic 0. The BUSY bit will go to logic 1
immediately after step 3 and remain at logic 1 until the request is complete.
5. If there is more data to be written, go back to step 1.
The indirect read programming sequence for the TPSC (RPSC) is as follows:
1. Check that the BUSY bit in the TPSC (RPSC) µP Access Status Register is
logic 0.
2. Write RWB=1 and the channel address to the TPSC (RPSC) Channel Indirect
Address/Control Register.
3. Poll the BUSY bit, waiting until it goes to a logic 0. The BUSY bit will go to
logic 1 immediately after step 2 and remain at logic 1 until the request is
complete.
4. Read the requested channel data from the TPSC (RPSC) Channel Indirect
Data Buffer register.
5. If there is more data to be read, go back to step 1.
12.8 T1/E1 Framer Loopback Modes
The TECT3 provides three loopback modes for T1/E1 links to aid in network and
system diagnostics. The internal T1/E1 line loopback can be initiated at any time
via the µP interface, but is usually initiated once an inband loopback activate
code is detected. The system Diagnostic Digital loopback can be initiated at any
time by the system via the µP interface to check the path of system data through
PROPRIETARY AND CONFIDENTIAL
151
PMC [ PMC-SIERRA, INC ]
