STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
software flag. If the EMPTY FIFO software flag is not set, FIFO emptying will
delayed until the FIFO fill level is exceeded.
5. Read the RDLC Data register.
6. Read the RDLC Status register.
7. If OVR = 1, then discard last frame and go to step 1. Overrun causes a reset
of FIFO pointers. Any packets that may have been in the FIFO are lost.
8. If COLS = 1, then set the EMPTY FIFO software flag.
9. If PKIN = 1, increment the PACKET COUNT. If the FIFO is desired to be
emptied as soon as a complete packet is received, set the EMPTY FIFO
software flag. If the EMPTY FIFO software flag is not set, FIFO emptying will
delayed until the FIFO fill level is exceeded.
10.Start the processing of FIFO data. Use the PBS[2:0] packet byte status bits
to decide what is to be done with the FIFO data.
If PBS[2:0] = 001, discard data byte read in step 5 and set the LINK ACTIVE
software flag.
If PBS[2:0] = 010, discard the data byte read in step 5 and clear the LINK
ACTIVE software flag.
If PBS[2:0] = 1XX, store the last byte of the packet, decrement the PACKET
COUNT, and check the PBS[1:0] bits for CRC or NVB errors before deciding
whether or not to keep the packet.
If PBS[2:0] = 000, store the packet data.
11.If FE = 0 and INTR = 1 or FE = 0 and EMPTY FIFO = 1, go to step 5 else
clear the EMPTY FIFO software flag and leave this interrupt service routine to
wait for the next interrupt.
The link state is typically a local software variable. The link state is inactive if the
RDLC is receiving all ones or receiving bit-oriented codes which contain a
sequence of eight ones. The link state is active if the RDLC is receiving flags or
data.
If the RDLC data transfer is operating in the polled mode, processor operation is
exactly as shown above for the interrupt driven mode, except that the entry to the
service routine is from a timer, rather than an interrupt.
PROPRIETARY AND CONFIDENTIAL
146
PMC [ PMC-SIERRA, INC ]
