PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Pin Name
Type
Pin
No.
Function
JTAG Interface
TDO
Tristate
Output
B2
A1
Test Data Output (TDO). This signal carries test data out of the
OCTLIU via the IEEE 1149.1 test access port. TDO is updated
on the falling edge of TCK. TDO is a tri-state output that is tri-
stated except when scanning of data is in progress.
TDI
Input
Test Data Input (TDI). This signal carries test data into the
OCTLIU via the IEEE 1149.1 test access port. TDI is sampled on
the rising edge of TCK. TDI has an internal pull up resistor.
TCK
TMS
Input
Input
C2
D3
Test Clock (TCK). This signal provides timing for test operations
that can be carried out using the IEEE 1149.1 test access port.
Test Mode Select (TMS). This signal controls the test operations
that can be carried out using the IEEE 1149.1 test access port.
TMS is sampled on the rising edge of TCK. TMS has an internal
pull up resistor.
TRSTB
Input
E4
Active low Test Reset (TRSTB). This signal provides an
asynchronous OCTLIU test access port reset via the IEEE 1149.1
test access port. TRSTB is a Schmidt triggered input with an
internal pull up resistor. TRSTB must be asserted during the
power up sequence.
Note that if not used, TRSTB should be connected to the RSTB
input.
Analogue Power and Ground Pins
TAVD1[1]
TAVD1[2]
TAVD1[3]
TAVD1[4]
TAVD1[5]
TAVD1[6]
TAVD1[7]
TAVD1[8]
Analogue D12
Transmit Analogue Power (TAVD1[8:1]). TAVD1[8:1] provide
power for the transmit LIU analogue circuitry. TAVD1[8:1] should
be connected to analogue +3.3 V.
Power
L19
M19
W12
W11
M4
L4
D11
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
28
PMC [ PMC-SIERRA, INC ]
