PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Figure 28 – HDB3 Line Code Violation Insertion
TCLK
continuous zeros
TDP
TXTIP
0 0 0 V
1 0 0 V
1 0 0 V
1
TXRING
TCLK
TDP
continuous zeros
0 0 0
V
1
TXTIP
TXRING
0 0 0
1 0 0 V
V
LCVINS = 1 causes omission
of bipolar pulse and violation
of same polarity as previous
violation.
The effect of setting the LCVINS bit of the Line Interface Diagnostics register is shown in Figure
28. TXTIP[X] and TXRING[X] have been shown as square NRZ pulses for illustrative purposes.
Setting LCVINS to a logic 1 generates one line code violation by causing the omission of a bipolar
pulse and hence a bipolar violation pulse of the same polarity as the previous bipolar violation
pulse when a string of 4 consecutive zeros occurs in the unipolar data stream TDP. To generate
another line code violation, the LCVINS bit must be reset to logic 0 and then set to logic 1 again.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
212
PMC [ PMC-SIERRA, INC ]
