PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
3. Read the third level Interrupt Source bits to identify the interrupt source. (These bits are
contained within the registers for the various functional blocks.)
4. Service the interrupt.
5. If the INTB pin is still logic 0, then there are still interrupts to be serviced. Otherwise, all
interrupts have been serviced. Wait for the next assertion of INTB
12.3 Using the Performance Monitoring Features
The PMON blocks are provided for performance monitoring purposes. The PMON blocks within
each LIU are used to monitor LCV events. An accumulation interval is initiated by writing to one
of the PMON event counter register addresses or by writing to the Line Interface Interrupt Source
/ PMON Update register. After initiating an accumulation interval, 3.5 recovered clock periods
must be allowed to elapse to permit the PMON counter values to be properly transferred before
the PMON registers may be read.
12.4 Using the Transmit Line Pulse Generator
The internal D/A pulse waveform template RAM, accessible via the microprocessor bus, can be
used to create up to 12 custom waveforms. The RAM is accessed indirectly through the XLPG
Pulse Waveform Storage Write Address and XLPG Pulse Waveform Storage Data registers. The
values written into the pulse waveform storage registers correspond to one of 127 quantized
levels. 24 samples are output during every transmit clock cycle.
The waveform being programmed is completely arbitrary and programming must be done
properly in order to meet the various T1 and E1 template specifications. The SCALE[4:0] bits of
Line Driver Configuration Register bits are used to obtain a proper output amplitude. It must also
be noted that since samples from the 5 UI are added before driving the DAC, it is possible to
create arithmetic overflows. The XLPG detects overflows and saturates the resulting value to –62
or +62 as appropriate. However, it is recommended that the pulse amplitude be programmed
such that overflows are avoided. It is possible to verify if an overflow condition occurred by
reading the OVRFLW register bit after programming a new waveform and transmission of data.
The following tables contain the waveform values to be programmed for different situations.
Table 20 to Table 29 specify waveform values typically used for T1 long haul and short haul
transmission. Table 30 to Table 36 specify waveform values for compliance to the AT&T TR62411
ACCUNET T1.5 pulse template. Table 37 and Table 38 specify waveform values for E1
transmission. The T1 and E1 waveforms shown in these tables (but not the TR62411 waveforms)
are also stored in a ROM within the OCTLIU. The ROM contents can be automatically loaded
into the waveform template RAM by setting the INITRAM bit in XLPG Control/Status register.
Note that the programming of template values must observe the following sequencing rule:
Samples must be written in groups of 5 at a time, each group consisting of the 5 UI values
corresponding to a particular waveform and sample number. For example, the following
programming sequence fragment is legal:
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
173
PMC [ PMC-SIERRA, INC ]
