PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 079H, 0F9H, 179H, 1F9H, 279H, 2F9H, 379H, 3F9H:
RLPS Equalization Indirect Data
Bit
Type
Function
Default
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
EQ_DATA[23]
EQ_DATA[22]
EQ_DATA[21]
EQ_DATA[20]
EQ_DATA[19]
EQ_DATA[18]
EQ_DATA[17]
EQ_DATA[16]
0
0
0
0
0
0
0
0
EQ_DATA[23:16]:
This register consists of 2-parts: read-only and write-only. Writing this register affects the
second most significant byte of the input-data to the equalization RAM. Reading it returns the
second MSB of the RAM location indexed by the RLPS Equalization Indirect Address register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
164
PMC [ PMC-SIERRA, INC ]
