PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 078H, 0F8H, 178H, 1F8H, 278H, 2F8H, 378H, 3F8H:
RLPS Equalization Indirect Data
Bit
Type
Function
Default
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
EQ_DATA[31]
EQ_DATA[30]
EQ_DATA[29]
EQ_DATA[28]
EQ_DATA[27]
EQ_DATA[26]
EQ_DATA[25]
EQ_DATA[24]
0
0
0
0
0
0
0
0
EQ_DATA[31:24]:
This register consists of 2-parts: read-only and write-only. Writing this register affects the
most significant byte of the input-data to the equalization RAM. Reading it returns the MSB of
the RAM location indexed by the RLPS Equalization Indirect Address register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
163
PMC [ PMC-SIERRA, INC ]
