PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 32EH: INSBI FIFO Thresholds
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MIN_THR[3]
MIN_THR[2]
MIN_THR[1]
MIN_THR[0]
MAX_THR[3]
MAX_THR[2]
MAX_THR[1]
MAX_THR[0]
0
1
1
0
1
1
1
0
MIN_THR[3:0]:
The MIN_THR[3:0] bits specify the tributary FIFO minimum threshold, i.e. the FIFO depth
below which a positive justification is performed.
Note – The default value of this register is the recommended value when operating in T1
mode. When operating in E1 mode, it is recommended that MIN_THR[3:0] be set to “0010”.
MAX_THR[3:0]:
The MAX_THR[3:0] bits specify the tributary FIFO maximum threshold, i.e. the FIFO depth
which when exceeded will cause a negative justification.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
91
PMC [ PMC-SIERRA, INC ]
