Data Book
PLX Technology, Inc.
Terms and
Abbreviations
PCI Express
Station
PHY
Port
PRBS
QoS
RAS
RoHS
RR
SerDes
TC
TDM
TLC
TLP
Transparent
Upstream station
VC
Virtual Interface
WRR
Definitions
A functional unit that provides the PCI Express conforming system interface. Includes the
Serializer and De-serializer (SerDes) hardware interface modules and PCI Express Interface,
which provides the Physical Layer, Data Link Layer, and Transaction Layer logic.
Physical Layer.
Ports are a collection of lanes configured at startup which contain the functional logic
and memory resources to communicate with like resources in other PCI Express devices.
Pseudo-Random Bit Sequence.
Quality of Service.
Reliability, Availability, and Serviceability.
Restrictions on the use of certain Hazardous Substances (RoHS) Directive.
Round-Robin scheduling.
Serializer/De-serializer. A high-speed differential-signaling parallel-to-serial and
serial-to-parallel conversion logic attached to lane pads.
Traffic Class.
Time Division Multiplexing.
Transaction Layer Control. The module performing PCI Express Transaction Layer
functions.
Transaction Layer Packet. PCI-Express packet formation and organization.
Refers to standard PCI Express upstream-to-downstream routing protocol.
Upstream station. Contains the component’s upstream port. An upstream station can contain
downstream ports.
Virtual Channel.
Secondary side of the NT port, connects to the internal virtual PCI Express interface.
Weighted Round-Robin scheduling.
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