PixArt Imaging Inc.
PAS202BCA/PAS202BBA
CMOS Image Sensor IC
registers value inside PAS202BCA/PAS202BBA can be programming via this way. (Please refer to Fig 4.3.)
4.2.2 Slave transmits data to master (read cycle)
§
§
§
§
The sub-address was taken from previous write cycle
The sub-address is automatically increment after each byte read
Am : Acknowledge by master
Note there is no acknowledgment from master after last byte read
1ST BYTE
SLAVE ADDRESS
(7 BITS)
2ND BYTE
n BYTE
S
RW
A
DATA (8 BIT)
Am
DATA
Am
DATA
1
P
NO ACK IN LAST
BYTE
During read cycle, the master generates start condition and then place the 1
st
byte data that are combined
slave address (7 bits) with a read/write control bit to SDA line. After issue acknowledgment, 8 bits DATA was
also placed on SDA line by PAS202BCA/PAS202BBA. The 8 bit data was read from PAS202BCA/PAS202BBA
internal control register that address was assigned by previous write cycle. Follow the master acknowledgment,
the PAS202BCA/PAS202BBA place the next 8 bits data (address is increment automatically) on SDA line and
then transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read,
Am is no longer generated by master but instead by keep SDA line high. The slave (PAS202BCA/PAS202BBA)
must releases SDA line to master to generate STOP condition. (Please refer to Fig 4.3.)
SDA
SCL
1-7
S
Start
Condition
Address
R/W
ACK
from
Receiver
Data
ACK
from
Receiver
Data
ACK
from
Receiver
8
9
1-7
8
9
1-7
8
9
P
Stop
Condition
Fig 4.3 Data Transfer Format
9
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PixArt Imaging Inc.
E-mail:
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V1.2, May. 2002
PIXART [ PIXART IMAGING INC. ]
