PixArt Imaging Inc.
PAS202BCA/PAS202BBA
CMOS Image Sensor IC
4.3 I2C Bus Timing
SD A
tBUF
tHD;STA
tr
tf
tSP
tf
tr
tSU;DAT
tLOW
SC L
tSU;STO
P
S
S
tHD;STA
Sr
tSU;STA
tHD;DAT
tHIGH
Fig 4.4 I2C Bus Timing
4.4 I2C Bus Timing Specification
PARAMETER
STANDARD-MODE
UNIT
SYMBOL
MIN.
10
MAX.
400
-
SCL clock frequency
kHz
us
fscl
Hold tie (repeated) START condition.
After this period, the first clock pulse is generated.
Low period of the SCL clock
4.0
tHD:STA
4.7
0.75
4.7
0
-
us
us
us
us
ns
t
t
t
t
LOW
HIGH
SU;STA
HD;DAT
HIGH period of the SCL clock
-
Set-up time for a repeated START condition
Data hold time. For I2C-bus device
Data set-up time
-
3.45
250
30
-
t
SU;DAT
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START
Capacitive load for each bus line
N.D.
ns(note1)
tr
tf
30
N.D.
ns(note1)
4.0
4.7
1
-
-
us
us
pF
V
t
SU;STO
tBUF
15
-
C
b
Noise margin at the LOW level for each connected
device (including hysteresis)
Noise margin at the HIGH level for each
connected device (including hysteresis)
VnL
0.1 VDD
0.2 VDD
-
V
VnH
Note 1: It depends on the "high" period time of SCL.
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10
PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
V1.2, May. 2002
PIXART [ PIXART IMAGING INC. ]
