PixArt Imaging Inc.
PAS005B
CMOS Image Sensor IC
Reg_30[3:0]
Reg_31[3:0]
Reg_32[3:0]
Cg_G1[3:0]
Cg_G0[3:0]
Cg_R[3:0]
R/W
R/W
R/W
0
0
0
Color gain of color G1
Color gain of color G0
Color gain of color R
2’s complement value for digital calibration of color
B
2’s complement value for digital calibration of color
G1
2’s complement value for digital calibration of color
G1
2’s complement value for digital calibration of color
G1
2’s complement value for digital calibration of color
G0
2’s complement value for digital calibration of color
G0
2’s complement value for digital calibration of color
R
2’s complement value for digital calibration of color
R
Reg_33[2:0]
Reg_34[7:0]
Reg_35[2:0]
Reg_36[7:0]
Reg_37[2:0]
Reg_38[7:0]
Reg_39[2:0]
Reg_40[7:0]
acc1_B[10:8]
acc1_B[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
acc1_G1[10:8]
acc1_G1[7:0]
acc1_G0[10:8]
acc1_G0[7:0]
acc1_R[10:8]
acc1_R[7:0]
used to synchronize register update by frame when
fast_i2c is set 0
It will be reset to 0 till the first new frame is readout
after it is set to 1
Reg_41[0]
flag
R/W
0
when it is set to 1, the mode related registers will be
updated only after mode_chg is set to 1
DAC & PGA update delay 1 frame automatically
fast update of synchronized i2c registers
source follower reset enable
Reg_42[2]
mode_chg_ena
R/W
1
Reg_42[1]
Reg_42[0]
Reg_43[7]
dac_pg_lag
fast_i2c
sfrst_ena
R/W
R/W
R/W
0
0
0
SHR extension CDS_rst1:
Reg_43[6:5]
shr_ext[1:0]
R/W
1
00: 9 ck12 01: 14 ck12
10: 19 ck12 11: 24 ck12
Reg_43[4:2]
Reg_43[1]
Reg_43[0]
comp_crv[2:0]
Vsync_p
R/W
R/W
R/W
0
0
0
companding curve
Vsync polarity
Hsync polarity
Hsync_p
DAC output range
Reg_44[7:6]
dacor[1:0]
R/W
0
00: x1/8 01: x1/4
10: x1/2 11: x1
Reg_44[5:0]
offset[5:0]
R/W
1
offset value for ABC
Reg_45[7:0] Threshold_1_by4[7:0] R/W
Reg_46[7:0] Threshold_2_by4[7:0] R/W
25
13
Threshold_1 divided by 4 for defect compensation
Threshold_2 divided by 4 for defect compensation
0: Defect compensation disable
1: Defect compensation enable
ABC enable high
Line based digital calibration enable high
Frame based digital calibration enable high
Number of pixels for Frame based digital calibration
00: 4 pixels 01: 8 pixels
Reg_47[5]
Defect_EnH
R/W
0
Reg_47[4]
Reg_47[3]
Reg_47[2]
ABC_EnH
Line_Avg_EnH
Frm_Avg_EnH
R/W
R/W
R/W
0
0
0
Reg_47[1:0] Avg_num_index[1:0] R/W
Reg_48[6] DSC_pd
R/W
1
0
10: 16 pixels 11: 32 pixels
Digital timing(column address, CDS timing) disable
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PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
PIXART [ PIXART IMAGING INC. ]
