PixArt Imaging Inc.
ADNS-7530 Integrated Molded Lead-Frame DIP Sensor
Run_Downshift
Address: 0x13
Access: Read/Write
Reset Value: 0x04
Bit
7
6
5
4
3
2
1
0
Field
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
This register set the Run to Rest 1 downshift time.
Run Downshift time = RD[7:0] x 8 x Run_rate.
Default value: 4 x 8 x 8ms = 256ms
Min: 2 x 8 x 8ms = 128ms
Max: 242 x 8 x 8ms = 15,488ms = 15.49s
All the above values are calculated based on 25MHz System clock, which expected to have 20% tolerance.
Rest1_Rate
Address: 0x14
Access: Read/Write
Reset Value: 0x01
Bit
7
6
5
4
3
2
1
0
Field
R1R
R1R
R1R
R1R
R1R
R1R
R1R
R1R
0
7
6
5
4
3
2
1
This register set the Rest 1 frame rate.
Rest1 frame rate = (R1R[7:0] + 1) x 10ms.
Default value: 2 x 10ms = 20ms
Min: 2 x 10ms = 20ms
Max: 241 x 10ms = 2,410ms = 2.41s
All the above values are calculated based on 100Hz Hibernate clock, which expected to have 40% tolerance.
Rest1_Downshift
Address: 0x15
Access: Read/Write
Reset Value: 0x1f
Bit
7
6
5
4
3
2
1
0
Field
R1D7
R1D6
R1D5
R1D4
R1D3
R1D2
R1D1
R1D0
This register set the Rest 1 to Rest 2 downshift time.
Rest1 Downshift time = R1D[7:0] x 16 x Rest1_Rate.
Default value: 31 x 16 x 20ms (Rest1_Rate default) = 9,920ms = 9.92s
Min: 1 x 16 x 20ms (Rest1_Rate min) = 320ms
Max: 242 x 16 x 2.56s (Rest1_Rate max) = 9,912s = 165min = 2.75hr
All the above values are calculated based on 100Hz Hibernate clock, which expected to have 40% tolerance.
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PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
29
PIXART [ PIXART IMAGING INC. ]
