Philips Semiconductors
Product specification
Baseband delay line
TDA4665
CHARACTERISTICS
V
P
= 5.0 V; input signals as specified in characteristics with 75% colour bars;
super-sandcastle frequency of 15.625 kHz; T
amb
= 25
°C;
measurements taken in Fig.3; unless otherwise specified.
SYMBOL
Supply
V
P1
V
P2
I
P1
I
P2
V
i(p-p)
analog supply voltage (pin 9)
digital supply voltage (pin 1)
analog supply current
digital supply current
input signal (peak-to-peak value)
±(R−Y)
PAL and NTSC (pin 16)
±(B−Y)
PAL and NTSC (pin 14)
±(R−Y)
SECAM (pin 16)
±(B−Y)
SECAM (pin 14)
V
i(max)(p-p)
maximum symmetrical input signal
(peak-to-peak value)
±(R−Y)
or
±(B−Y)
for PAL and NTSC
±(R−Y)
or
±(B−Y)
for SECAM
R
14, 16
C
14, 16
V
14, 16
V
o(p-p)
input resistance during clamping
input capacitance
input clamping voltage
proportional to V
P
before clipping
before clipping
1
2
−
−
1.3
−
−
−
−
1.5
−
−
40
10
1.7
V
V
kΩ
pF
V
note 1
−
−
−
−
525
665
1.05
1.33
−
−
−
−
mV
mV
V
V
4.5
4.5
−
−
5
5
4.8
0.7
6
6
6.0
1.0
V
V
mA
mA
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Colour-difference input signals
Colour-difference output signals
output signal (peak-to-peak value)
±(R−Y)
on pin 11
±(B−Y)
on pin 12
V
11
/V
12
V
11, 12
R
11, 12
G
v
V
n
/V
n+1
V
n(rms)
ratio of output amplitudes at equal input
signals
DC output voltage
output resistance
gain for PAL and NTSC
gain for SECAM
ratio of delayed to non-delayed output
signals (pins 11 and 12)
noise voltage (RMS value;
pins 11 and 12)
ratio V
o
/V
i
ratio V
o
/V
i
V
i(14,16)(p-p)
= 1.33 V;
SECAM signals
V
i(14,16)
= 0 V; note 2
V
i(14,16)
= 0 V; active
video; R
S
= 300
Ω
−
−
V
o(p-p)
= 1 V; note 2
−
63.94
−
−
54
64
5
10
−
64.06
mV
mV
dB
µs
all standards
all standards
V
i(14,16)(p-p)
= 1.33 V
proportional to V
P
−
−
−0.4
2.5
−
5.3
−0.6
−0.1
−
1.05
1.33
0
2.9
330
5.8
−0.1
0
−
−
−
+0.4
3.3
400
6.3
+0.4
+0.1
1.2
V
V
dB
V
Ω
dB
dB
dB
mV
V
(11,12)(p-p)
unwanted signals (line-locked)
(peak-to-peak value)
meander
spikes
S/N(W)
∆t
d
weighted signal-to-noise ratio
(pins 11 and 12)
time difference between non-delayed and
delayed output signals (pins 11 and 12)
1996 Dec 17
5
PHILIPS [ NXP SEMICONDUCTORS ]
