Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
the YSCI (scaling increment), YACL (accumulation length;
optimum: 1 line overlap) and YP (scaling start phase) have
to be set according to the equations below, see Fig.21.
7.9.2.4
Vertical scaler
The vertical scaler performs the vertical downscaling of the
input data stream to a randomly number of output lines.
It can be used for input line lengths up to 768 pixels/line
and has to be bypassed, if the input line length exceeds
this pixel count.
• YACL = TRUNC [NIL/NOL − 1] accumulation sequence
length; i.e. number of lines per sequence, that are not
part of overlay region of neighbouring sequences
(optimum: 1 line overlapped)
For the vertical scaling there are two different modes:
• YSCI = INT [1024 × (1 − NOL/NIL)] scaling increment
• The ACCU mode (vertical accumulation) for scales
down to icon size and
• YPx = INT [YSCI/16] scaling start phase (fix; modified in
LPI mode only).
• The Linear Phase Interpolation (LPI) mode for scales
between 1 and 1⁄2.
In order to get a unity amplitude gain for all sequence
lengths and to improve the vertical scaling performance,
the accumulated lines can be weighted and the amplitude
of the scaled output signal has to be renormalized. In the
given example (see Fig.21), using the optimal weighting,
the gain of a sequence results in 1 + 2 + 2 + 1 = 6.
Renormalization (factor 1⁄6) can be done
7.9.2.5
ACCU mode (scaling factor range 1 to 1/1024;
YACM = 1)
For vertical scales down to icon size the ACCU mode can
be used. In this mode the parameter YSCI controls the
scaling and the parameter YACL the vertical anti-aliasing
filtering.
• By gain reduction using BCS control (brightness,
contrast, saturation) down to 4⁄6 and selecting factor 1⁄4
for DCGY2 to DCGY0 which may result in a loss of
signal quantization, or
• By gain emphasizing using BCS control up to 8⁄6
and selecting factor 1⁄8 for DCGY2 to DCGY0 which
may result in a loss of signal detail due to limiting in the
BCS control.
The output lines are generated by a scale-dependent
variable averaging of (YACL + 2) input lines. In this way a
vertical FIR filter is build for anti-aliasing, with up to
maximum 65 taps.
YSCI defines the output line qualifier pattern and YACL
defines the sequence length for the line averaging.
For accurate processing the sequence has to fit into the
qualifying pattern. In case of misprogramming YACL,
unexpected line dropping occurs.
Normally, the weighting would be 2 + 2 + 2 + 2. In this
case the gain can be renormalized simply with
DCGY2 to DCGY0 = ‘010’ (factor 1⁄8). Table 58 gives
examples for register settings depending on a given scale
ratio.
Where:
• NOL = Number of Output Lines and
• NIL = Number of Input Lines.
scaling factor S = 1/3: vertical accumulation of 4 lines (1 line overlap)
optimal weighting factors:
handbook, full pagewidth
line 1
line 2
1
2
2
1
2
2
1
2
2
1
1st sequence
2nd sequence
YACL = INT {(1 - S)/S}
= 2 (dotted lines)
= 682
YSCI = INT {1024 × (1 - S)}
3rd sequence
YP x = INT {YSCI/16}
= 42
MGD697
Fig.21 Example: vertical accumulation.
73
1998 Apr 09
NXP [ NXP ]
