Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
SYMBOL
AD15
PIN
STATUS
DESCRIPTION
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
I/O
I/O
I/O
I/O
P
bidirectional DEBI multiplexed address data line bit 15
bidirectional DEBI multiplexed address data line bit 14
bidirectional DEBI multiplexed address data line bit 13
bidirectional DEBI multiplexed address data line bit 12
digital supply voltage 15 (3.3 V)
AD14
AD13
AD12
VDDD15
n.c.
−
reserved pin; not connected internally
VSSD17
AD11
AD10
AD9
P
digital ground 17
I/O
I/O
I/O
I/O
P
bidirectional DEBI multiplexed address data line bit 11
bidirectional DEBI multiplexed address data line bit 10
bidirectional DEBI multiplexed address data line bit 9
bidirectional DEBI multiplexed address data line bit 8
digital supply voltage 16 (3.3 V)
AD8
VDDD16
n.c.
−
reserved pin; not connected internally
VSSD18
RWN_SBHE
AS_ALE
LDS_RDN
UDS_WRN
DTACK_RDY
VDDD17
n.c.
P
digital ground 18
O
DEBI data transfer control output signal (read write not/system byte high enable)
DEBI address strobe and address latch enable output
lower data strobe/read not output
O
O
O
upper data strobe/write not output
I
DEBI data transfer acknowledge or ready input
digital supply voltage 17 (3.3 V)
P
−
reserved pin; not connected internally
digital ground 19
VSSD19
AD0
P
I/O
I/O
I/O
I/O
P
bidirectional DEBI multiplexed address data line bit 0
bidirectional DEBI multiplexed address data line bit 1
bidirectional DEBI multiplexed address data line bit 2
bidirectional DEBI multiplexed address data line bit 3
digital supply voltage 18 (3.3 V)
AD1
AD2
AD3
VDDD18
n.c.
−
reserved pin; not connected internally
digital ground 20
VSSD20
AD4
P
I/O
I/O
I/O
I/O
−
bidirectional DEBI multiplexed address data line bit 4
bidirectional DEBI multiplexed address data line bit 5
bidirectional DEBI multiplexed address data line bit 6
bidirectional DEBI multiplexed address data line bit 7
reserved pin; do not connect
AD5
AD6
AD7
n.c.
n.c.
−
reserved pin; do not connect
VDDD19
n.c.
P
digital supply voltage 19 (3.3 V)
−
reserved pin; not connected internally
reserved pin; do not connect
n.c.
−
VSSD21
WS0
P
digital ground 21
I/O
I/O
bidirectional word select signal for audio interface A1
bidirectional serial data for audio interface A1
SD0
1998 Apr 09
14
NXP [ NXP ]
