Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
SYMBOL
STOP#
PIN
STATUS
DESCRIPTION
bidirectional PCI stop signal (active LOW)
79
80
I/O
O
PERR#
n.c.
PCI parity error output signal (active LOW)
reserved pin; do not connect
81
−
PAR
82
I/O
I/O
P
bidirectional PCI parity signal
C/BE# [1]
VDDD10
n.c.
83
bidirectional PCI-bus command and byte enable 1 (active LOW)
digital supply voltage 10 (3.3 V)
84
85
−
reserved pin; not connected internally
digital ground 11
VSSD11
AD PCI15
AD PCI14
AD PCI13
AD PCI12
VDDD11
n.c.
86
P
87
I/O
I/O
I/O
I/O
P
bidirectional PCI multiplexed address/data bit 15
bidirectional PCI multiplexed address/data bit 14
bidirectional PCI multiplexed address/data bit 13
bidirectional PCI multiplexed address/data bit 12
digital supply voltage 11 (3.3 V)
88
89
90
91
92
−
reserved pin; not connected internally
digital ground 12
VSSD12
AD PCI11
AD PCI10
AD PCI9
AD PCI8
n.c.
93
P
94
I/O
I/O
I/O
I/O
−
bidirectional PCI multiplexed address/data bit 11
bidirectional PCI multiplexed address/data bit 10
bidirectional PCI multiplexed address/data bit 9
bidirectional PCI multiplexed address/data bit 8
reserved pin; do not connect
95
96
97
98
n.c.
99
−
reserved pin; not connected internally
digital ground 13
VSSD13
C/BE# [0]
AD PCI7
AD PCI6
VDDD12
n.c.
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
P
I/O
I/O
I/O
P
bidirectional PCI multiplexed bus command and byte enable (active LOW)
bidirectional PCI multiplexed address/data bit 7
bidirectional PCI multiplexed address/data bit 6
digital supply voltage 12 (3.3 V)
−
reserved pin; do not connect
n.c.
−
reserved pin; not connected internally
digital ground 14
VSSD14
AD PCI5
AD PCI4
AD PCI3
AD PCI2
VDDD13
n.c.
P
I/O
I/O
I/O
I/O
P
bidirectional PCI multiplexed address/data bit 5
bidirectional PCI multiplexed address/data bit 4
bidirectional PCI multiplexed address/data bit 3
bidirectional PCI multiplexed address/data bit 2
digital supply voltage 13 (3.3 V)
−
reserved pin; not connected internally
digital ground 15
VSSD15
AD PCI1
AD PCI0
VDDD14
n.c.
P
I/O
I/O
P
bidirectional PCI multiplexed address/data bit 1
bidirectional PCI multiplexed address/data bit 0
digital supply voltage 14 (3.3 V)
−
reserved pin; not connected internally
digital ground 16
VSSD16
P
1998 Apr 09
13
NXP [ NXP ]
