Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D[3:0] mode selection
MODE[3:0] 0000 Mode 0: CVBS (automatic gain) from AI11 (pin 20); see Fig. 43
0001 Mode 1: CVBS (automatic gain) from AI12 (pin 18); see Fig. 44
0010 Mode 2: CVBS (automatic gain) from AI21 (pin 16); see Fig. 45
0011 Mode 3: CVBS (automatic gain) from AI22 (pin 14); see Fig. 46
0100 Mode 4: CVBS (automatic gain) from AI23 (pin 12); see Fig. 47
0101 Mode 5: CVBS (automatic gain) from AI24 (pin 10); see Fig. 48
0110 Mode 6: Y (automatic gain) from AI11 (pin 20) + C (gain adjustable
via GAI28 to GAI20) from AI21 (pin 16); note 1; see Fig. 49
0111 Mode 7: Y (automatic gain) from AI12 (pin 18) + C (gain adjustable
via GAI28 to GAI20) from AI22 (pin 14); note 1; see Fig. 50
1000 Mode 8: Y (automatic gain) from AI11 (pin 20) + C (gain adapted to
Y gain) from AI21 (pin 16); note 1; see Fig. 51
1001 Mode 9: Y (automatic gain) from AI12 (pin 18) + C (gain adapted to
Y gain) from AI22 (pin 14); note 1; see Fig. 52
1111 Modes 10 to 15: reserved
Note
1. To take full advantage of the Y/C-modes 6 to 9 the I2C-bus bit BYPS (subaddress 09H, bit 7) should be set to logic 1
(full luminance bandwidth).
AI24
handbook, halfpage
AI24
handbook, halfpage
AI23
AI22
AI21
AI23
AI22
AI21
AD2
AD1
AD2
AD1
CHROMA
CHROMA
LUMA
AI12
AI11
LUMA
AI12
AI11
MHB560
MHB559
Fig.43 Mode 0; CVBS (automatic gain).
Fig.44 Mode 1; CVBS (automatic gain).
AI24
AI24
handbook, halfpage
AI23
handbook, halfpage
AI23
AD2
AD1
AD2
AD1
AI22
AI21
AI22
AI21
CHROMA
CHROMA
LUMA
LUMA
AI12
AI11
AI12
AI11
MHB561
MHB562
Fig.45 Mode 2; CVBS (automatic gain).
Fig.46 Mode 3; CVBS (automatic gain).
2000 Mar 15
90
NXP [ NXP ]
