Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
15.2 I2C-bus details
15.2.1 SUBADDRESS 00H
Table 37 Chip Version (CV) identification; 00H[7:4]; read only register
LOGIC LEVELS
FUNCTION
ID07
ID06
ID05
ID04
Chip Version (CV)
15.2.2 SUBADDRESS 01H
CV0
CV1
CV2
CV3
The programming of the horizontal increment delay is used to match internal processing delays to the delay of the ADC.
Use recommended position only.
Table 38 Horizontal increment delay; 01H[3:0]
FUNCTION
IDEL3
IDEL2
IDEL1
IDEL0
No update
1
1
1
0
1
1
0
0
1
1
0
0
1
0
0
0
Minimum delay
Recommended position
Maximum delay
15.2.3 SUBADDRESS 02H
Table 39 Analog input control 1 (AICO1); 02H[7:0]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D[7:6] analog function
select (see Fig.6)
FUSE[1:0]
00
01
10
11
00
01
10
11
amplifier plus anti-alias filter bypassed
amplifier active
amplifier plus anti-alias filter active
D[5:4] update
hysteresis for
9-bit gain (see
Fig.7)
GUDL[1:0]
off
±1 LSB
±2 LSB
±3 LSB
2000 Mar 15
89
NXP [ NXP ]
