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SAA7114H 参数 Datasheet PDF下载

SAA7114H图片预览
型号: SAA7114H
PDF下载: 下载PDF文件 查看货源
内容描述: PAL / NTSC / SECAM视频解码器具有自适应PAL / NTSC梳状滤波器, VBI数据限幅器和高性能的定标器 [PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC combfilter, VBI-data slicer and high performance scaler]
分类和应用: 解码器转换器色度信号转换器消费电路商用集成电路
文件页数/大小: 140 页 / 549 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Preliminary specification  
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC  
comb filter, VBI-data slicer and high performance scaler  
SAA7114H  
13 CHARACTERISTICS  
VDDD = 3.0 to 3.6 V; VDDA = 3.1 to 3.5 V; Tamb = 25 °C; timings and levels refer to drawings and conditions illustrated in  
Fig.39; unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Supplies  
VDDD  
IDDD  
digital supply voltage  
digital supply current  
3.0  
3.3  
3.6  
V
X-port 3-state; 8-bit I-port  
90  
mA  
PD  
power dissipation digital  
part  
300  
mW  
VDDA  
IDDA  
analog supply voltage  
analog supply current  
3.1  
3.3  
3.5  
V
AOSL1 to AOSL0 = 0  
CVBS mode  
47  
mA  
Y/C mode  
72  
mA  
PA  
power dissipation analog  
part  
CVBS mode  
150  
240  
450  
540  
5
mW  
mW  
mW  
mW  
mW  
Y/C mode  
Ptot(A+D)  
total power dissipation  
analog and digital part  
CVBS mode  
Y/C mode  
Ptot(A+D)(pd)  
total power dissipation  
analog and digital part in  
power-down mode  
CE pulled down to ground  
Ptot(A+D)(ps)  
total power dissipation  
analog and digital part in  
power-save mode  
I2C-bus controlled via  
subaddress 88H = 0FH  
75  
mW  
Analog part  
Iclamp  
Vi(p-p)  
clamping current  
VI = 0.9 V DC  
±8  
µA  
input voltage  
(peak-to-peak value)  
for normal video levels  
1 V (p-p), 3 dB  
0.7  
V
termination 27/47 and  
AC coupling required;  
coupling capacitor = 22 nF  
Zi  
Ci  
input impedance  
input capacitance  
channel crosstalk  
clamping current off  
200  
kΩ  
pF  
dB  
10  
αcs  
fi < 5 MHz  
50  
9-bit analog-to-digital converters  
B
analog bandwidth  
at 3 dB  
7
2
MHz  
deg  
φdiff  
differential phase  
(amplifier plus anti-alias  
filter bypassed)  
Gdiff  
differential gain  
2
%
(amplifier plus anti-alias  
filter bypassed)  
fclk(ADC)  
ADC clock frequency  
12.8  
14.3  
MHz  
2000 Mar 15  
73  
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