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a
TEST
SELECTOR
AND
9
AOUT
BUFFER
2
V
V
SSA1
SSA2
41
AOSL (1 : 0)
ADC2
1
AI22
AI2D
AI21
ANALOG
AMPLIFIER
DAC9
SOURCE
SWITCH
CLAMP
CIRCUIT
ANTI-ALIAS
FILTER
BYPASS
SWITCH
44
43
3
V
DDA1
DDA2
FUSE (1 : 0)
42
V
7
5
4
AI12
AI1D
AI11
ANALOG
AMPLIFIER
DAC9
CLAMP
CIRCUIT
ANTI-ALIAS
FILTER
BYPASS
SWITCH
SOURCE
SWITCH
ADC1
FUSE (1 : 0)
VERTICAL
BLANKING
CONTROL
MODE
CONTROL
CLAMP
CONTROL
GAIN
CONTROL
ANTI-ALIAS
CONTROL
HCL
VBLNK
SVREF
GLIMB HSY
GLIMT
WIPA
VBSL
HOLDG
GAFIX
WPOFF
GUDL0-GUDL2
GAI20-GAI28
GAI10-GAI18
HLNRS
MODE 3
MODE 2
MODE 1
MODE 0
9
9
SLTCA
ANALOG CONTROL
UPTCV
6
CROSS MULTIPLEXER
AGND
MHB326
AD2BYP AD1BYP
LUM
CHR
Fig.6 Analog input processing using the SAA7113H as differential front-end with 9-bit ADC.
NXP [ NXP ]
